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1 ltc1874 features applicatio s u typical applicatio n u descriptio u dual constant frequency current mode step-down dc/dc controller the ltc 1874 is a dual constant frequency current mode step-down dc/dc controller with excellent ac and dc loadand line regulation. each controller has an accurate undervoltage lockout that shuts down the individual con- troller when the input voltage falls below 2.0v. the ltc1874 boasts 2.5% output voltage accuracy and consumes only 270 m a of quiescent current per controller. the ltc1874 is configured with burst mode operation,which enhances efficiency at low output current for appli- cations where efficiency is a prime consideration. to further maximize the life of a battery source, eachexternal p-channel mosfet is turned on continuously in dropout (100% duty cycle). in shutdown, each controller draws a mere 8 m a. high constant operating frequency of 550khz allows the use of small external inductors. the ltc1874 is available in a small footprint 16-leadnarrow ssop. figure 1. ltc1874 3.5v-9.5v input to 3.3v/1a and 1.8v/1a dual step-down converter 1- or 2-cell lithium-ion-powered applications personal information appliances portable computers distributed 3.3v, 2.5v or 1.8v power systems high efficiency: up to 94% high output currents easily achieved wide v in range: 2.5v to 9.8v constant frequency 550khz operation burst mode tm operation at light load low dropout: 100% duty cycle 0.8v reference allows low output voltages current mode operation for excellentline and load transient response low quiescent current: 270 m a (each controller) separate shutdown pin for each controller shutdown mode draws only8 m a supply current (each controller) 2.5% reference accuracy available in 16-lead narrow ssop each controller functions independent of the other , ltc and lt are registered trademarks of linear technology corporation. burst mode is a trademark of linear technology corporation. v in1 sense1 gnd1v fb1 i th /run1 pgnd1pgate1 pv in1 87 6 5 12 11 10 9 12 3 4 1314 15 16 pv in2 pgate2 pgnd2 i th /run2 v fb2 gnd2 sense2 v in2 ltc1874 10k 220pf m2 d2 c247 f 6v r20.04 l2 4.7 h 220pf 10k r10.04 80.6k 1874 ta01 100k v out2 1.8v1a + 80.6k 249k c147 f 6v c1, c2: sanyo poscap 6tpa47mc in : taiyo yuden ceramic emk325bj106mnt ( 2) d1, d2: mbrm120l1, l2: coilcraft d01608c-472 m1, m2: si3443dv r1, r2: dale 0.25w l1 4.7 h + c in 10 f 16v 2 v in 3.5v to 9.5v d1 m1 v out1 3.3v 1a downloaded from: http:///
2 ltc1874 absolute m axi m u m ratings w ww u (note 1)input supply voltage (v in , pv in ) ............... 0.3v to 10v sense , pgate voltages ............. 0.3v to (v in + 0.3v) v fb , i th /run voltages .............................. 0.3v to 2.4v pgate peak output current (< 10 m s) ....................... 1a storage ambient temperature range ... 65 c to 150 c operating temperature range (note 2) .. 40 c to 85 c junction temperature (note 3) ............................. 150 c lead temperature (soldering, 10 sec).................. 300 c package/order i n for m atio n w u u t jmax = 150 c, q ja = 135 c/ w gn part marking order part number ltc1874egn 1874 consult factory for parts specified with wider operating temperature ranges. all specifications apply to each controller. the denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = 4.2v unless otherwise specified. (note 2) parameter conditions min typ max units input dc supply current (per controller) typicals at v in = 4.2v (note 4) normal operation 2.4v v in 9.8v 270 420 m a sleep mode 2.4v v in 9.8v 230 370 m a shutdown 2.4v v in 9.8v, v ith /run = 0v 8 22 m a uvlo v in < uvlo threshold 6 10 m a undervoltage lockout threshold v in falling 1.55 2.0 2.35 v v in rising 1.85 2.3 2.40 v shutdown threshold (at i th /run) 0.15 0.35 0.55 v start-up current source v ith /run = 0v 0.25 0.5 0.85 m a regulated feedback voltage t a = 0 c to 70 c (note 5) 0.780 0.800 0.820 v t a = 40 c to 85 c (note 5) 0.770 0.800 0.830 v output voltage line regulation 2.4v v in 9.8v (note 5) 0.05 mv/v output voltage load regulation i th /run sinking 5 m a (note 5) 2.5 mv/ m a i th /run sourcing 5 m a (note 5) 2.5 mv/ m a v fb input current (note 5) 10 50 na overvoltage protect threshold measured at v fb 0.820 0.860 0.895 v overvoltage protect hysteresis 20 mv oscillator frequency v fb = 0.8v 500 550 650 khz v fb = 0v 120 khz gate drive rise time c load = 3000pf 40 ns gate drive fall time c load = 3000pf 40 ns peak current sense voltage (note 6) 120 mv 12 3 4 5 6 7 8 top view gn package 16-lead narrow plastic ssop 1615 14 13 12 11 10 9 v in1 sense1 gnd1 v fb1 i th /run2 pgnd2 pgate2 pv in2 pv in1 pgate1pgnd1 i th /run1 v fb2 gnd2sense2 v in2 electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired.note 2: the ltc1874e is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the ?0 c to 85 c operating temperature range are assured by design, characterization and correlationwith statistical process controls. note 3: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula: t j = t a + (p d ? q ja c/w) note 4: dynamic supply current is higher due to the gate charge being delivered at the switching frequency.note 5: each controller in the ltc1874 is individually tested in a feedback loop that servos v fb to the output of the error amplifier. note 6: peak current sense voltage is reduced dependent upon duty cycle to a percentage of value as given in figure 2. downloaded from: http:///
3 ltc1874 typical perfor m a n ce characteristics u w reference voltagevs temperature undervoltage lockout tripvoltage vs temperature shutdown thresholdvs temperature maximum (v in ?sense ) voltage vs duty cycle normalized oscillator frequencyvs temperature temperature ( c) ?5 775 v fb voltage (mv) 780 790 795 800 825810 ?5 25 45 125 1874 g01 785 815 820805 ?5 5 65 85 105 v in = 4.2v temperature ( c) ?5 ?0 normalized frequency (%) ? ? ? 0 10 4 ?5 25 45 125 1874 g02 ? 6 82 ?5 5 65 85 105 v in = 4.2v temperature ( c) ?5 1.84 trip voltage (v) 1.88 1.96 2.00 2.04 2.242.12 ?5 25 45 125 1874 g03 1.92 2.16 2.202.08 ?5 5 65 85 105 v in falling duty cycle (%) 20 30 trip voltage (mv) 100 1874 g04 40 50 60 70 80 90 130120 110 100 9080 70 60 50 v in = 4.2v t a = 25 c temperature ( c) ?5 200 i th /run voltage (mv) 240 320 360 400 600480 ?5 25 45 125 1874 g05 280 520 560440 ?5 5 65 85 105 v in = 4.2v downloaded from: http:///
4 ltc1874 pi n fu n ctio n s uuu v in1 (pin 1): main supply pin for controller #1. this pin delivers the input dc supply current (listed in the electri-cal characteristics table) plus a small amount of logic switching current. must be connected to pv in1 (pin 16) and closely decoupled to gnd1 (pin 3).sense1 (pin 2): the negative input to the current comparator of controller #1.gnd1 (pin 3): signal ground for controller #1. must be connected to pgnd1 (pin 14).v fb1 (pin 4): receives the feedback voltage from an external resistive divider across the output of controller#1. i th /run2 (pin 5): this pin performs two functions. it serves as the error amplifier compensation point as well asthe run control input of controller #2. the current com- parator threshold increases with this control voltage. nominal voltage range for this pin is 0.7v to 1.9v. forcing this pin below 0.35v causes controller #2 to be shut down. in shutdown, all functions of controller #2 are disabled and pgate2 (pin 7) is held high. pgnd2 (pin 6): power ground for controller #2. must be connected to gnd2 (pin 11).pgate2 (pin 7): gate drive for the external p-channel mosfet of controller #2. this pin swings from 0v to thevoltage of pv in2 . pv in2 (pin 8): power supply pin for controller #2. this pin delivers the dynamic switching current that drives the gateof the external p-channel mosfet of controller #2. must be connected to v in2 (pin 9) and closely decoupled to pgnd2 (pin 6). v in2 (pin 9): main supply pin for controller #2. this pin delivers the input dc supply current (listed in the electri-cal characteristics table) plus a small amount of logic switching current. must be connected to pv in2 (pin 8) and closely decoupled to gnd2 (pin 11).sense2 (pin 10): the negative input to the current comparator of controller #2.gnd2 (pin 11): signal ground for controller #2. must be connected to pgnd2 (pin 6).v fb2 (pin 12): receives the feedback voltage from an external resistive divider across the output of controller#2. i th /run1 (pin 13): this pin performs two functions. it serves as the error amplifier compensation point as well asthe run control input of controller #1. the current com- parator threshold increases with this control voltage. nominal voltage range for this pin is 0.7v to 1.9v. forcing this pin below 0.35v causes controller #1 to be shut down. in shutdown, all functions of controller #1 are disabled and pgate1 (pin 15) is held high. pgnd1 (pin 14): power ground for controller #1. must be connected to gnd1 (pin 3).pgate1 (pin 15): gate drive for the external p-channel mosfet of controller #1. this pin swings from 0v to thevoltage of pv in1 . pv in1 (pin 16): power supply pin for controller #1. this pin delivers the dynamic switching current that drives thegate of the external p-channel mosfet of controller #1. must be connected to v in1 (pin 1) and closely decoupled to pgnd1 (pin 14). downloaded from: http:///
5 ltc1874 fu n ctio n al diagra uu w controller #1 switching logic and blanking circuit + + + 0.15v 0.5 a 0.3v sleep ovp short-circuit detect burst cmp shdn 1.2v uv 1874fd v ref +60mv v ref 0.8v v in rs1 voltage reference slope comp i cmp rs q freq foldback osc sense1 v in1 1 3 2 + eamp v fb1 + 4 pv in2 8 pgate2 7 pgnd2 6 v fb2 12 i th /run2 controller #2 is the same as controller #1 pgate1 15 pgnd1 14 pv in1 16 i th /run1 v in 0.35v v ref 0.8v 13 + shdn cmp 0.3v gnd1 11 gnd2 + undervoltage lockout v in v in2 9 sense2 5 10 controller #2 downloaded from: http:///
6 ltc1874 (refer to functional diagram) the ltc1874 is a dual, constant frequency current modeswitching regulator. the two switching regulators func- tion identically but independent of each other. the follow- ing description of operation is written for a single switching regulator. main control loopduring normal operation, the external p-channel power mosfet is turned on by the oscillator and turned off when the current comparator (i cmp ) resets the rs latch. the peak inductor current at which i cmp resets the rs latch is controlled by the voltage on the i th /run pin, which is the output of the error amplifier eamp. an external resistivedivider connected between v out and ground allows the eamp to receive an output feedback voltage v fb . when the load current increases, it causes a slight decrease in v fb relative to the 0.8v reference, which in turn causes thei th /run voltage to increase until the average inductor current matches the new load current. the main control loop is shut down by pulling the i th /run pin low. releasing i th /run allows an internal 0.5 m a current source to charge up the external compensationnetwork. when the i th /run pin reaches 0.35v, the main control loop is enabled with the i th /run voltage then pulled up to its zero current level of approximately 0.7v.as the external compensation network continues to charge up, the corre sponding output current trip level follows, allowing normal operation. comparator ovp guards against transient overshootsgreater than 7.5% by turning off the external p-channel power mosfet and keeping it off until the fault is removed . burst mode operationthe controller enters burst mode operation at low load currents. in this mode, the peak current of the inductor is set as if v ith /run = 1v (at low duty cycles) even though the voltage at the i th /run pin is at a lower value. if the inductor? average current is greater than the load require-ment, the voltage at the i th /run pin will drop. when the i th /run voltage goes below 0.85v, the sleep signal goes high, turning off the external mosfet. the sleep signalgoes low when the i th /run voltage goes above 0.925v and the controller resumes normal operation. the nextoscillator cycle will turn the external mosfet on and the switching cycle repeats. dropout operation when the input supply voltage decreases towards the output voltage, the rate of change of inductor current during the on cycle decreases. this reduction means that the external p-channel mosfet will remain on for more than one oscillator cycle since the inductor current has not ramped up to the threshold set by eamp. further reduc- tion in input supply voltage will eventually cause the p-channel mosfet to be turned on 100%, i.e., dc. the output voltage will then be determined by the input voltage minus the voltage drop across the mosfet, the sense resistor and the inductor. undervoltage lockout to prevent operation of the p-channel mosfet below safe input voltage levels, an undervoltage lockout is incorpo- rated into the controller. when the input supply voltage drops below approximately 2.0v, the p-channel mosfet and all circuitry is turned off except the undervoltage block, which draws only several microamperes. short-circuit protection when the output is shorted to ground, the frequency of the oscillator will be reduced to about 120khz. this lower frequency allows the inductor current to safely discharge, thereby preventing current runaway. the oscillator? fre- quency will gradually increase to its designed rate when the feedback voltage again approaches 0.8v. overvoltage protection as a further protection, the overvoltage comparator in the controller will turn the external mosfet off when the feedback voltage has risen 7.5% above the reference voltage of 0.8v. this comparator has a typical hysteresis of 20mv. operatio u downloaded from: http:///
7 ltc1874 slope compensation and inductor? peak currentthe inductor? peak current is determined by: i v r pk ith sense = () C 07 10 when the controller is operating below 40% duty cycle.however, once the duty cycle exceeds 40%, slope com- pensation begins and effectively reduces the peak inductor current. the amount of reduction is given by the curves in figure 2. figure 2. percentage of maximum output current vs duty cycle duty cycle (%) 110100 9080 70 60 50 40 30 20 10 sf = i out /i out(max) (%) 1874 f02 0 70 80 90 100 60 10 20 30 40 50 i ripple = 0.4i pk at 5% duty cycle i ripple = 0.2i pk at 5% duty cycle v in = 4.2v the basic ltc1874 application circuit is shown infigure 1. external component selection for each control- ler is driven by the load requirement and begins with the selection of l1 and r sense (= r1). next, the power mosfet (m1) and the output diode (d1) are selectedfollowed by c in and c out (= c1). r sense selection for output current r sense is chosen based on the required output current. with the current comparator monitoring the voltage devel-oped across r sense , the threshold of the comparator determines the inductor? peak current. the output cur-rent the controller can provide is given by: i v r i out sense ripple =- 012 2 . where i ripple is the inductor peak-to-peak ripple current (see inductor value calculation section).a reasonable starting point for setting ripple current is i ripple = (0.4)(i out ). rearranging the above equation, it becomes: r i sense out = () ( ) 1 10 for duty cycle < 40% however, for operation that is above 40% duty cycle, slopecompensation effect has to be taken into consideration to select the appropriate value to provide the required amountof current. using figure 2, the value of r sense is: r sf i sense out = () ( ) ( ) 10 100 where sf is the ?lope factor.inductor value calculation the operating frequency and inductor selection are inter- related in that higher operating frequencies permit the use of a smaller inductor for the same amount of inductor ripple current. however, this is at the expense of efficiency due to an increase in mosfet gate charge losses. the inductance value also has a direct effect on ripple current. the ripple current, i ripple , decreases with higher inductance or frequency and increases with higher v in or v out . the inductor? peak-to-peak ripple current is given by: i vv fl vv vv ripple in out out d in d = - () + + ? ? ?? where f is the operating frequency. accepting larger valuesof i ripple allows the use of low inductances, but results in higher output voltage ripple and greater core losses. areasonable starting point for setting ripple current is applicatio s i for atio wu uu operatio u downloaded from: http:///
8 ltc1874 i ripple = 0.4(i out(max) ). remember, the maximum i ripple occurs at the maximum input voltage.in burst mode operation on an ltc1874 controller, the ripple current is normally set such that the inductor current is continuous during the burst periods. therefore, the peak-to-peak ripple current must not exceed: i v r ripple sense 003 . this implies a minimum inductance of: l vv f r vv vv min in out sense out d in d = - ? ? ?? + + ? ? ?? 003 . (use v in(max) = v in ) a smaller value than l min could be used in the circuit; however, the inductor current will not be continuousduring burst periods. inductor core selection once the value of inductor is known, an off the shelf inductor can be selected. the inductor should be rated for the calculated peak current. some manufacturers specify both peak saturation current and peak rms current. make sure that the rms current meets your continuous load requirements. also, you may want to compare the dc resistance of different inductors in order to optimize the efficiency. inductor core losses are usually not specified and you will need to evaluate them yourself. usually, the core losses are not a problem because the inductors operate with relatively low magnetic flux swings. the best way to evaluate the core losses is by measuring the converters efficiency. converter efficiency will reveal the difference in both dc current losses and core losses. off the shelf inductors are available from numerous manu- facturers. some of the most common manufacturers are coilcraft, coiltronics, panasonic, toko, tokin, murata and sumida. power mosfet selectionthe main selection criteria for the power mosfet are the threshold voltage v gs(th) , the ?n?resistance r ds(on) , reverse transfer capacitance c rss and total gate charge. since the controller is designed for operation down to lowinput voltages, a logic level threshold mosfet (r ds(on) guaranteed at v gs = 2.5v) is required for applications that work close to this voltage. when these mosfets are used,make sure that the input supply to the controller is less than the absolute maximum v gs rating, typically 8v. the required minimum r ds(on) of the mosfet is gov- erned by its allowable power dissipation. for applicationsthat may operate the controller in dropout, i.e., 100% duty cycle, at its worst case the required r ds(on) is given by: r p ip ds on p out max dc () () % = = () + () 100 2 1 d where p p is the allowable power dissipation and d p is the temperature dependency of r ds(on) . (1 + d p) is generally given for a mosfet in the form of a normalized r ds(on) vs temperature curve, but d p = 0.005/ c can be used as an approximation for low voltage mosfets.in applications where the maximum duty cycle is less than 100% and the controller is in continuous mode, the r ds(on) is governed by: r p dc i p ds on p out () @ () + () 2 1 d where dc is the maximum operating duty cycle of thecontroller. output diode selection the catch diode carries load current during the off-time. the average diode current is therefore dependent on the mosfet duty cycle. at high input voltages the diode conducts most of the time. as v in approaches v out the diode conducts only a small fraction of the time. the moststressful condition for the diode is when the output is applicatio s i for atio wu uu downloaded from: http:///
9 ltc1874 short-circuited. under this condition the diode must safelyhandle i peak at close to 100% duty cycle. therefore, it is important to adequately specify the diode peak current andaverage power dissipation so as not to exceed the diode ratings. under normal load conditions, the average current con- ducted by the diode is: i vv vv i d in out in d out = - + ? ? ?? the allowable forward voltage drop in the diode is calcu-lated from the maximum short-circuit current as: v p i f d sc max ? () where p d is the allowable power dissipation and will be determined by efficiency and/or thermal requirements.schottky diodes are a good choice for low forward drop and fast switching times. remember to keep lead length short and observe proper grounding (see board layout checklist) to avoid ringing and increased dissipation. c in and c out selection in continuous mode, the source current of the p-channelmosfet is a square wave of duty cycle (v out + v d )/ (v in + v d ). to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current mustbe used. the maximum rms capacitor current is given by: ci vvv v in max out in out in required i rms ? - () [] 12 / this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do notoffer much relief. several capacitors may be paralleled to meet the size or height requirements in the design. due to the high operating frequency of the controller, ceramic capacitors can also be used for c in . always consult the manufacturer if there is any question.the selection of c out is driven by the required effective series resistance (esr). typically, once the esr require-ment is satisfied, the capacitance is adequate for filtering. the output ripple ( d v out ) is approximated by: d v i esr fc out ripple out ?+ ? ? ?? 1 4 where f is the operating frequency, c out is the output capacitance and i ripple is the ripple current in the induc- tor. the output ripple is highest at maximum input voltagesince d i l increases with input voltage. once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. multiple capacitors may have to be paral-leled to meet the esr or rms current handling require- ments of the application. aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. an excellent choice of tantalum capacitors are the avx tps and kemet t510 series of surface mount tantalum capacitors. applicatio s i for atio wu uu downloaded from: http:///
10 ltc1874 figure 3. line regulation of v ref and v ith input voltage (v) 2.0 normalized voltage (%) 105100 9590 85 80 75 2.2 2.4 2.6 2.8 1874 f03 3.0 v ref v ith figure 4. setting output voltage low supply operationalthough the controller can function down to approxi- mately 2.0v, the maximum allowable output current is reduced when v in decreases below 3v. figure 3 shows the amount of change as the supply is reduced down to 2v.also shown in figure 3 is the effect of v in on v ref as v in goes below 2.3v.setting output voltage the controller develops a 0.8v reference voltage between the feedback (v fb ) terminal and ground (see figure 4). by selecting resistor r1, a constant current is caused to flowthrough r1 and r2 to set the overall output voltage. the regulated output voltage is determined by: vv r r out =+ ? ? ?? 08 1 2 1 . for most applications, an 80k resistor is suggested for r1.to prevent stray pickup, locate resistors r1 and r2 close to the ltc1874. foldback current limiting as described in the output diode selection, the worst- case dissipation occurs with a short-circuited output when the diode conducts the current limit value almost continuously. to prevent excessive heating in the diode, foldback current limiting can be added to reduce the current in proportion to the severity of the fault. foldback current limiting is implemented by adding di- odes d fb1 and d fb2 between the output and the i th /run pin as shown in figure 5. in a hard short (v out = 0v), the current will be reduced to approximately 50% of themaximum output current. 4 v fb1 3 gnd1 v out 1/2 ltc1874 r1 1874f04 r2 figure 5. foldback current limiting v fb1 gnd1 i th /run1 v out 1/2 ltc1874 r1 1874 f05 r2 43 13 d fb1 d fb2 + applicatio s i for atio wu uu downloaded from: http:///
11 ltc1874 pc board layout checklistwhen laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc1874. these items are illustrated graphically for a single controller in the layout diagram in figure 6. check the following in your layout: 1. is the schottky diode closely connected between power ground (pgnd) and the drain of the external mosfet? 2. does the (+) plate of c in connect to the sense resistor as closely as possible? this capacitor provides accurrent to the mosfet. 3. is the input decoupling capacitor (0.1 m f) connected closely between v in and signal ground (gnd)? 4. connect the end of r sense as close to v in as possible. the v in pin is the sense + of the current comparator. 5. is the trace from sense to the sense resistor kept short? does the trace connect close to r sense ? 6. keep the switching node pgate away from sensitive small signal nodes. 7. does the v fb pin connect directly to the feedback resistors? the resistive divider r1 and r2 must beconnected between the (+) plate of c out and signal ground. 8. pv in must connect to v in and pgnd must connect to gnd. isolate high current power paths from signalpower and signal ground where possible in the layout. an unbroken ground plane is recommended. figure 6. ltc1874 layout diagram (see pc board layout checklist) v in sense gndv fb 1615 14 13 12 3 4 pv in pgate pgnd i th /run 1/2 ltc1874 0.1 f r sense c in c out v out v in d1 l1 m1 sw r ith c ith 1874 f06 + r2 bold lines indicate high current paths r1 + applicatio s i for atio wu uu information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. downloaded from: http:///
12 ltc1874 1874f lt/tp 0201 4k ? printed in usa related parts part number description comments ltc1147 series high efficiency step-down switching regulator controllers 100% duty cycle, 3.5v v in 16v ltc1622 synchronizable low input voltage current mode step-down v in 2v to 10v, i out up to 4.5a, dc/dc controller burst mode operation optional, 8-lead msop ltc1624 high efficiency so-8 n-channel switching regulator controller 8-pin n-channel drive, 3.5v v in 36v ltc1625 no r sense tm synchronous step-down regulator 97% efficiency, no sense resistor; up to 10a ltc1626 low voltage, high efficiency step-down dc/dc converter monolithic, constant off-time, low voltage range: 2.5v to 6v ltc1628 dual, 2-phase synchronous step-down controller minimum c in and c out , 3.5v v in 36v ltc1735 single, high efficiency, low noise synchronous switching controller high efficiency 5v to 3.3v conversion at up to 15a lt1767 1.5a, 500khz step-down switching regulators high frequency, small inductor, high efficiency ltc1772 constant frequency current mode step-down dc/dc controller v in 2.5v to 9.8v, i out up to 4a, sot-23 package ltc1773 synchronous step-down controller v in 2.65v to 8.5v, i out up to 4a ltc1877/ltc1878 low voltage, monolithic synchronous step-down regulator low supply voltage range: 2.65v to 8v, i out = 0.5a no r sense is a trademark of linear technology corporation. ? linear technology corporation 2000 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear-tech.com ltc1874 2.5v?.5v input to 3.3v/1a and 1.8v/1a dual converter gn16 (ssop) 1098 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side 0.016 ?0.050 (0.406 ?1.270) 0.015 0.004 (0.38 0.10) 45 0 ?8 typ 0.007 ?0.0098 (0.178 ?0.249) 0.053 ?0.068 (1.351 ?1.727) 0.008 ?0.012 (0.203 ?0.305) 0.004 ?0.0098 (0.102 ?0.249) 0.0250 (0.635) bsc 12 3 4 5 6 7 8 0.229 ?0.244 (5.817 ?6.198) 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.189 ?0.196* (4.801 ?4.978) 12 11 10 9 0.009 (0.229) ref dimensions in inches (millimeters) unless otherwise noted. gn package 16-lead plastic ssop (narrow 0.150) (ltc dwg # 05-08-1641) typical applicatio u u package descriptio v in1 sense1 gnd1v fb1 i th /run1 pgnd1pgate1 pv in1 87 6 5 12 11 10 9 12 3 4 1314 15 16 pv in2 pgate2 pgnd2 i th /run2 v fb2 gnd2 sense2 v in2 ltc1874 10k 220pf m2 d2 c247 f 6v r20.082 l2 4.7 h 220pf 10k r10.03 80.6k 1874 ta02 100k v out2 1.8v1a + 80.6k 249k c147 f 2 c1, c2: sanyo poscap 6tpa47mc in : taiyo yuden ceramic emk325bj106mnt ( 2) d1: 15mq040nd2: mbrm120 l1: bh-electronics bh511-1012 l2: coiltronics up2b-4r7 m1, m2: si3443dv r1, r2: dale 0.25w l1 + c in 10 f 16v 2 v in 2.5v to 8.5v d1 l1a m1 v out1 3.3v 1a downloaded from: http:///

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